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Tuesday
, April 2
8:30am CDT
Welcome and Check in
Commons Conference Center, Lil Tex Auditorium
9:00am CDT
What is RISC-V?
Commons Conference Center, Lil Tex Auditorium
9:15am CDT
Platform Security--A Detailed Comparison of RISC-V to ARM's TrustZone - Don Barnetson, HexFive
Commons Conference Center, Lil Tex Auditorium
9:35am CDT
Bring Real-Time to Linux with RISC-V Based SoC FPGA - Tim Morin, Microchip
Commons Conference Center, Lil Tex Auditorium
9:55am CDT
Hardware/Software Co-design with the Open Source Renode Framework and RISC-V - Michael Gielda, Antmicro
Commons Conference Center, Lil Tex Auditorium
10:30am CDT
Taking RISC-V into high-performance sockets with custom instructions - Emerson Hsiao, Andes Technology
Commons Conference Center, Lil Tex Auditorium
10:50am CDT
Custom Instructions and Architecture Optimization for RISC-V - Larry Lapides, Imperas
Commons Conference Center, Lil Tex Auditorium
11:10am CDT
Is There a Hole in Your RISC-V Security Stack? - Jothy Rosenberg, Dover Microsystems
Commons Conference Center, Lil Tex Auditorium
11:45am CDT
SweRV Core, Production Grade, Open Source RISC-V Core - Ted Marena, Western Digital
Commons Conference Center, Lil Tex Auditorium
12:05pm CDT
Innovation Unleashed: Solutions and Silicon Enabling the Intelligent Edge and Linux - Drew Barbier, SiFive
Commons Conference Center, Lil Tex Auditorium
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Commons Conference Center, Lil Tex Auditorium
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Tuesday
, April 2
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Commons Conference Center, Lil Tex Auditorium
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